PROJECT BOREAL - HARDWARE TARGETS v0.1
8 November 2026

USER REQUIREMENT
H200 and B300 GPUs should excel at the eventual algorithm. Retain RTX 5090
as a viable comparison target. This is a design objective, not a measured result.

DESIGN DIRECTION
Evaluate memory-bandwidth-bound proof of work with many independent nonce
streams so the GPU can hide memory latency. Explore read patterns that use
available bandwidth while preserving enough dependencies to investigate
shortcut resistance. Use exact integer operations and deterministic hashing.
Do not depend on floating-point Tensor Core output for consensus.

Treat a shared 20 GiB dataset as a candidate, not a final requirement. It can
fit within the nominal capacity of each target device with further runtime
headroom checks. Additional VRAM does not automatically multiply hashrate;
extra capacity helps only where measured batching or scratch requirements use
it. Do not require datasets over 32 GB merely to privilege expensive hardware.
Do not issue hardware-specific rewards or trust a declared GPU model.

PRIMARY SPECIFICATION REFERENCES
RTX 5090: NVIDIA lists 1792 GB/s memory bandwidth.
https://www.nvidia.com/en-us/geforce/graphics-cards/50-series/
H200: NVIDIA lists 141 GB HBM3e and 4.8 TB/s memory bandwidth.
https://resources.nvidia.com/en-us-gpu-resources/hpc-datasheet-sc23
Blackwell Ultra: current datasheet lists HGX B300 at 270 GB and 7.7 TB/s;
GB300 NVL72 individual GPUs at 279 GB and 8 TB/s. Older architecture material
uses 288 GB nominal. Confirm exact system and available capacity before
benchmarking; do not interchange GB300 and HGX B300 specifications.
https://resources.nvidia.com/en-us-gpu-resources/blackwell-ultra-datasheet
https://developer.nvidia.com/blog/inside-nvidia-blackwell-ultra-the-chip-powering-the-ai-factory-era

BANDWIDTH COMPARISON, NOT A HASHRATE FORECAST
RTX 5090 = 1.792 TB/s, baseline 1.00.
H200 = 4.8 TB/s, approximately 2.68 times baseline.
HGX B300 = 7.7 TB/s, approximately 4.30 times baseline.
These ratios assume equal bytes per nonce and equal realized bandwidth
utilization. They are not expected hashrates or profit multiples. Random
latency, arithmetic, cache, occupancy, register pressure, spills, thermals,
power limits and software efficiency can change the ranking and scaling.

BENCHMARK ACCEPTANCE
Measure valid work per second, independently verified shares, end-to-end and
kernel timing, wall power, work per joule, verifier cost and capital cost.
Compare multiple NVIDIA and AMD models and a CPU; model FPGA/ASIC economics.
For eight GPUs, test independent work on each GPU first. Do not add NVLink
communication to each nonce just to use the interconnect. Measure overhead
before claiming linear eight-GPU scaling. Record driver, toolchain, source
revision, memory configuration and power limit.

SECURITY AND STATUS
HBM bandwidth can benefit GPUs and purpose-built ASICs alike. It provides
no ASIC exclusion guarantee. The final dataset derivation and PoW remain
unspecified. Existing CUDA memory probe and SHA-256 scanner are research
baselines, not a final algorithm. No hardware benchmark has been run here.
This brief supplements the existing whitepaper without claiming that the
proposed features are implemented or that the design is unique.
